/*************************************************************
 * File: mon/mxops.c
 * Purpose: Part of core Monitor
 * Author: Phil Bunce (pjb@carmel.com)
 * Revision History:
 *	970304	Start of revision history
 */

#include <mon.h>

/*************************************************************
*  U64 mXpc(int mode,int reg,int size,U64 value)
*/
U64 mXpc(int mode,int reg,int size,U64 value)
{
if (mode) write_target(XT_PC,0,value,0);
else return read_target(XT_PC,0,0);
}

/*************************************************************
*  U64 mXgpr(int mode,int reg,int size,U64 value)
*/
U64 mXgpr(int mode,int reg,int size,U64 value)
{
if (mode) putGpr(reg,value);
else return getGpr(reg);
}

/*************************************************************
*  U64 mXmem(int mode,ADDR adr,int size,U64 value)
*	size={8,16,32,64}
*/
U64 mXmem(int mode,ADDR adr,int size,U64 value)
{
int sz;

if (size) sz = size/8;
else sz = 4;
if (mode) write_target(XT_MEM,adr,value,sz);
else return read_target(XT_MEM,adr,sz);
}

/*************************************************************
*  U64 mXc0(int mode,int reg,int size,U64 value)
*/
U64 mXc0(int mode,int reg,int size,U64 value)
{
 
if (mode) write_target(XT_CP0,reg,value,0);
else return read_target(XT_CP0,reg,0);
}

/*************************************************************
*  U64 mXc1(int mode,int reg,int size,U64 value)
*/
U64 mXc1(int mode,int reg,int size,U64 value)
{
 
if (mode == 0) /* read */ return read_target(XT_CP1,reg,0);
else write_target(XT_CP1,reg,value,0);
}
 
/*************************************************************
*  U64 cXc1(int mode,int reg,int size,U64 value)
*/
U64 cXc1(int mode,int reg,int size,U64 value)
{
 
if (mode == 0) /* read */ return read_target(XT_CP1C,reg,0);
else write_target(XT_CP1C,reg,value,0);
}

/*************************************************************
*  U64 mXc2(int mode,int reg,int size,U64 value)
*/
U64 mXc2(int mode,int reg,int size,U64 value)
{

if (mode == 0) /* read */ return read_target(XT_CP2,reg,0);
else write_target(XT_CP2,reg,value,0);
}

/*************************************************************
*  U64 cXc2(int mode,int reg,int size,U64 value)
*/
U64 cXc2(int mode,int reg,int size,U64 value)
{

if (mode == 0) /* read */ return read_target(XT_CP2C,reg,0);
else write_target(XT_CP2C,reg,value,0);
}

/*************************************************************
*  U64 mXdbx(int mode,int reg,int size,U64 value)
*/
U64 mXdbx(int mode,int reg,int size,U64 value)
{

if (mode) write_target(XT_DBX,reg,value,0);
else return read_target(XT_DBX,reg,0);
}